METHOD FOR MANUFACTURING HIGH-TEMPERATURE CMOS SOI INTEGRATED CIRCUITS Russian patent published in 2018 - IPC H01L21/8238 

FIELD: manufacturing technology.

SUBSTANCE: invention relates to manufacturing semiconductor devices and super-large integrated circuits based on a silicon substrate using a hidden insolator (SOI), intended for using in medias with a maximum temperature of up to 250 °C. Summary of the invention: a method for manufacturing high-temperature CMOS SOI integrated circuits, comprising steps of forming regions of fine slit insulation STI, ion implantation in the pocket area of n- and p-channel MOS transistors, forming a layer of a gate isolator, depositing a layer of polycrystalline silicon, and forming shutters of MOS transistors, ion implantation in the area of drainage and source of MOS transistors, forming contact windows to the active areas and forming a metallization system, characterized be the fact that in ion implantation in a drain region and source region of MOS transistors of n-type, the dose of arsenic ions is from 2×10¹⁵ to 3×10¹⁵ cm^-2, the beam energy is from 63 to 77 keV, and for drain source regions of MOS-transistors of n-type, the dose of boron ions is from 2.8×10¹⁵ to 4.2×10¹⁵ cm^-2, the beam energy is from 6 to 8 keV.

EFFECT: invention provides increased stability of integrated circuits to high temperatures.

4 cl, 19 dwg, 2 tbl