STACK PATTERN FORMATION Russian patent published in 2022 - IPC H05K3/46 H01L21/469 H01L21/475 H01L21/4763 

FIELD: electrical engineering.

SUBSTANCE: invention relates to a method for the formation of a stack of layers, forming an electrical circuit and containing a number of levels of inorganic interconnects. The method includes a stage, at which: an interconnect is formed for at least one of levels at stages before and after a stage of formation of a pattern of an underlying organic layer containing a layer of unstitched polymer, and one stage of formation of an interconnect includes a stage, at which an interconnect pattern is formed, providing a template for creation of through holes through the underlying organic layer on one or more interconnect sections, where the interconnect should contact another interconnect at a lower level of interconnects. Another stage includes a stage, at which interconnect material is applied to at least a section of through holes.

EFFECT: reduction in the degree of destruction of a pattern of a lower layer of interconnects when etching layers of an overlying level of interconnects with an acid etcher after the stage of application of an underlying dielectric layer due to the use of unstitched organic polymer material as a dielectric layer.

7 cl, 9 dwg