FIELD: microelectronics; semiconductor memory circuits built around MIS transistors. SUBSTANCE: insulating layer is formed on superconducting substrate surface, protective coat is deposited, contact cut is made in protective coating and in insulating layer to substrate, polycrystalline silicon layer is evaporated, plate is formed by etching evaporated layer through photoresist mask, auxiliary layer is applied contact cut in it is opened with vertical walls to plate, then additional layer of polycrystalline silicon is evaporated, after which wall projections are produced by mask-free anisotropic plasma etching of additional layer on plate surface in contact cut of auxiliary layer, and finally auxiliary layer is removed from plate surface. EFFECT: improved efficiency of plate surface without enlarging its size due to developing its profile. 5 dwg
Title | Year | Author | Number |
---|---|---|---|
METHOD FOR PRODUCING STORAGE CAPACITOR PLATE FOR MEMORY ELEMENTS OF INTEGRATED CIRCUITS | 1991 |
|
SU1829792A1 |
MANUFACTURING PROCESS FOR STORAGE CAPACITOR OF INTEGRATED-CIRCUIT MEMORY ELEMENT | 1990 |
|
RU2110870C1 |
PROCESS OF MANUFACTURE OF MOS IC WITH CAPACITORS | 0 |
|
SU1804664A3 |
METHOD OF MANUFACTURING SEMICONDUCTING DEVICES WITH NEAR-WALL <P-N>-TRANSITIONS | 1981 |
|
SU1072666A1 |
METHOD OF SMOOTH PATTERN PRODUCTION ON INTEGRATED CIRCUITS | 1990 |
|
SU1766214A1 |
METHOD TO MANUFACTURE NANOSIZED WIRE SILICON STRUCTURES | 2010 |
|
RU2435730C1 |
PROCESS OF FORMATION OF CIRCUITRY | 1992 |
|
RU2054745C1 |
METHOD OF METALLIZING INTEGRATED CIRCUITS | 1987 |
|
SU1477175A1 |
METHOD OF FORMATION OF MICROSTRUCTURAL DEVICES WITH CROSS-METALIZED HOLES ON SINGLE CRYSTALLINE SILICON SURFACE | 2018 |
|
RU2676240C1 |
METHOD FOR MANUFACTURING A MOS TRANSISTOR ON A SILICON-ON-INSULATOR STRUCTURE | 2022 |
|
RU2784405C1 |
Authors
Dates
1996-10-10—Published
1991-06-24—Filed