FIELD: microelectronics; semiconductor storage circuits built around MIS transistors. SUBSTANCE: semiconductor substrate surface with already formed vertical-wall depressions is covered with conducting layer, capacitor plate pattern is made on it, isolating dielectric layer is deposited, sections of this layer are removed from horizontal surface of plate by mask-free anisotropic plasma etching, then additional conducting layer is deposited onto shaped plate surface obtained, sections of this layer are removed from horizontal surfaces of plates by mask-free anisotropic plasma etching, and remaining wall sections of isolating layer are removed by selective etching. EFFECT: improved quality of capacitor due to enlarging effective area of plate without increasing its top dimensions. 6 dwg
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Authors
Dates
1996-10-10—Published
1991-06-24—Filed