FIELD: microelectronics. SUBSTANCE: conductors are fabricated on substrate. A dielectric film is applied. A resist film is applied. The resist film is removed over the central portion of the surface of conductors and the dielectric layer is etched until the surface of conductors gets exposed. The resist film is removed. An organic film is formed from liquid phase. Simultaneous etching of the organic and dielectric films is performed until the conductors get exposed. The given method allows interlever windows to be formed that are beyond the boundaries of conductors. This enhances the packing density and decreases the crystal size. EFFECT: enhanced reliability and percentage of yield of fabricated circuits due to improvement of planarization of conductor rail. 2 cl, 6 dwg
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