FIELD: microelectronics. SUBSTANCE: process involves formation of MIS structures protected by insulating layer, deposition of metal, removal of photoresist masks, formation of interlevel insulation, contact apertures, passivation treatment. In all operations involving heat action on MIS structures of large-scale integrated circuits carrying first metallization level in the course of their manufacture temperature conditions are strictly controlled and specified both for direct heating of substrate and for its indirect heating when applying high-frequency fields in chemical plasma etching. Chemical plasma treatment is additionally performed for interlevel insulating layer in carbon chloride and/or silicon chloride plasma. EFFECT: improved output of serviceable large-scale integrated circuits, eliminated danger of through conducting flaws in interlevel insulating layer.
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Authors
Dates
1994-10-30—Published
1991-07-08—Filed