FIELD: manufacture of semiconductors. SUBSTANCE: in process of formation of multilevel interconnections of integrated microcircuits lower dielectric layer is deposited with thickness amounting to 1.3-1.4 of thickness of lower level of interconnections. After opening of windows in organic layer it is subjected to thermal ion and photon stabilization treatment. Nonselective etching of organic and dielectric layers is conducted with speed of 0.6-0.8 μm/min with heating of structure surfaces up to 200-220 C till residual thickness of dielectric layer reaches 0.1-0.3 μm above wires of interconnections with maximum thickness. Next dielectric layer is deposited. Subsequent organic layer is applied and windows are formed in it in correspondence to regions of interlevel contacts. Selective with respect to subsequent organic layer etching of following dielectric layer is conducted. After this residual subsequent organic is removed. EFFECT: manufacture of planar surface close to ideal one, realization of SLSIs with two or more levels of interconnections with enhanced density of packaging. 3 cl
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Authors
Dates
1995-02-09—Published
1991-06-04—Filed