FIELD: microelectronics. SUBSTANCE: in manufacturing dielectric-isolated integrated circuit, isolating grooves are etched on plain-parallel single-crystal low-alloyed silicon chip, high-alloyed buried layer of same polarity of conductivity as chip is formed, insulating oxide and single-crystal silicon substrate are formed, single-crystal silicon is removed to shape isolated pockets, transistor structures are formed in isolated pockets, ports are opened for high-alloyed regions joined with buried layer; in the process, measures are taken to prevent their boundaries from emerging beyond isolated pockets at point where pocket boundary is crossed by deposited bus; high-alloyed regions are formed, dielectric is deposited on surfaces of high-alloyed regions, ports are opened for contacts to single-crystal silicon, metallization buses are formed. EFFECT: facilitated manufacture of dielectric-isolated high-voltage power integrated circuits. 2 dwg, 1 tbl
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Authors
Dates
1994-11-30—Published
1991-06-13—Filed