THREE-DIMENSIONAL NEUROSTRUCTURE Russian patent published in 2001 - IPC

FIELD: integrated structures of semiconductor microelectronics and silicon nanoelectronics. SUBSTANCE: three-dimensional neurostructure primarily used for largescale integrated neurocircuits and neurocomputers has semiconductor substrate of definite polarity of conductivity with source, drain, and bump whose side surface is covered with first insulating layer and whose opposite ends carry gates; polarity of conductivity of substrate upper layer and bump is reverse to that of substrate base; bump conductivity is close to inherent conductivity of semiconductor. Gates on side surfaces of bump are proposed to be made in the form of floating gates each covered with second insulating layer carrying n isolated input contacts with respective pads, capacitances of input contacts relative to floating gate being such that they dictate weight values and form weighted addition function by adding charges at floating gate of neurostructure and threshold function. Respective input contacts on right- and left-hand side surfaces of bump may be held closed or open depending on operating conditions of structure; structure drain is, essentially, absorbing contact made in the form of two adjacent different-type n and p Schottky-barrier contacts. EFFECT: enlarged functional capabilities, reduced number of interconnecting lines at high packing density, reduced power requirement. 1 dwg