FIELD: manufacture of semiconductor memory devices. SUBSTANCE: proposed method involves connection of bit bus and capacitor storage electrode to active zone of substrate through contact pad formed in self- aligning manner. Method includes fabrication of gate electrodes covered with nitride gasket on semiconductor substrate. Then thermal oxide layer is formed on naked surface of semiconductor substrate between gate electrodes. After that etch-ceasing layer is formed on entire surface of resultant structure provided with thermal oxide layer of adequate thickness so as not to cover space between gate electrodes. Then first interlayer dielectric film (ILD) covering space between gate electrodes and upper part of the latter is deposited, this procedure being followed by structurization of first ILD film to form contact cut for exposing the gasket and etch-ceasing layer The latter and the thermal oxide film are then removed to expose semiconductor substrate surface whereupon contact cut is filled with conducting material so as to form contact pads. EFFECT: enlarged alignment range of memory device. 26 cl, 61 dwg
