FIELD: improved multi-bit magnetic memorizing device with arbitrary selection and methods for functioning and manufacture of such a device.
SUBSTANCE: magnetic memory includes one or more paired cells, each one of which has multilayer magnetic structure. Structure contains magnetic-changeable ferromagnetic layer, ferromagnetic basic layer, having non-changeable magnetization state, and corresponding separating layer which divides ferromagnetic layers. Memory cells are ordered in such a way, that effective remaining magnetization of each cell is not parallel to cell axis which is parallel to its long side. Methods describe functioning process of such a device.
EFFECT: increased data recording density, reduced energy consumption and simplified manufacturing process of memorizing device.
3 cl, 30 dwg
Title | Year | Author | Number |
---|---|---|---|
MRAM CELL AND METHOD FOR WRITING TO MRAM CELL USING THERMALLY ASSISTED WRITE OPERATION WITH REDUCED FIELD CURRENT | 2013 |
|
RU2599941C2 |
CMOS/SOI MRAM MEMORY INTEGRATED WITH VLSI AND METHOD FOR PRODUCTION THEREOF (VERSIONS) | 2012 |
|
RU2532589C2 |
METHOD OF FORMING MAGNETORESISTIVE MEMORY ELEMENT BASED ON TUNNEL JUNCTION AND STRUCTURE THEREOF | 2012 |
|
RU2522714C2 |
MAGNETIC MEMORY AND METHOD OF MANAGEMENT OF IT | 2014 |
|
RU2628221C1 |
MAGNETIC RANDOM ACCESS MEMORY CELL WITH LOW POWER CONSUMPTION | 2012 |
|
RU2573757C2 |
RANDOM-ACCESS MAGNETIC MEMORY CELL | 2018 |
|
RU2704732C1 |
SPIN-TORQUE TRANSFER MAGNETORESISTIVE MRAM MEMORY ARRAY INTEGRATED INTO VLSIC CMOS/SOI WITH n+ AND p+ POLYSILICON GATES | 2012 |
|
RU2515461C2 |
MEMORY DEVICE WITH CHANGE OF RESISTANCE | 2016 |
|
RU2702271C2 |
SEMICONDUCTOR MEMORY DEVICE | 2014 |
|
RU2642960C2 |
MAGNETIC TUNNEL JUNCTION DEVICE WITH SEPARATE READ AND WRITE PATHS | 2008 |
|
RU2453934C2 |
Authors
Dates
2007-11-20—Published
2005-10-26—Filed