NONVOLATILE MEMORY LOCATION Russian patent published in 2003 - IPC

Abstract RU 2205471 C2

FIELD: microelectronics. SUBSTANCE: self-adjusting nonvolatile memory location has MOS transistor with source and drain regions disposed in vicinity of surface of semiconductor substrate 1. MOS transistor electrode 12 of memory gate and electrode 16 of control gate are arranged so that they are relatively overlapped in slot while transistor channel laterally passes in vicinity of slot surface. Gate oxide 9 that insulates memory gate electrode 12 from semiconductor substrate 1 and memory gate electrode 12 are provided with ledge near transition to oxide layer 11 of side wall; transistor channel area is made along external surface around depression.. EFFECT: improved coupling between floating and control gates, reduced layout cost. 4 cl, 13 dwg, 1 tbl

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RU 2 205 471 C2

Authors

Tempel' Georg

Dates

2003-05-27Published

1997-09-15Filed