FIELD: electrically recorded and erased nonvolatile flash-memories.
SUBSTANCE: proposed memory device is built around memory locations incorporating memory transistor whose gate electrode is disposed on top end of substrate between source and drain regions and separated from semiconductor material by insulator incorporating memory layer between boundary layers. Gate electrode is disposed in groove made in semiconductor material between source and drain regions; memory layer is disposed at least between source region and gate electrode as well as between drain region and gate electrode. Each of gate electrodes passes current through conducting track that functions as word bus. Source and drain regions of one memory location function at the same time as drain and source regions of adjacent memory location, respectively. Word buses run across grooves.
EFFECT: reduced space requirement.
11 cl, 13 dwg
