MANUFACTURING PROCESS FOR ARRAY SOURCE AREAS OF FAST PROGRAMMABLE ELECTRICALLY ERASABLE READ-ONLY MEMORY CELLS Russian patent published in 2001 - IPC

FIELD: computer engineering; manufacture of memory cells. SUBSTANCE: protective insulation is made by covering semiconductor substrate with multilayer silicon oxide-polycrystalline silicon-silicon oxide structure (sandwich). For doping source areas and source connecting tracks photoresist mask is applied so that areas between word buses of respective pair of word buses are left free. Photoresist mask should cover only part of word buses and therefore it does not need high-precision adjustment. Doping material is then implanted in self-alignment manner relative to word buses due to high-energy implantation. If multilayer insulating structure is found too thick, anisotropic etching of silicon oxide layer above polycrystalline silicon layer may be made also in self-alignment manner before implantation. EFFECT: reduced space requirement for cell while adequate read-out characteristic is ensured. 6 cl, 13 dwg