NON-VOLATILE MEMORY DEVICE Russian patent published in 2023 - IPC H10B41/40 G11C16/06 

FIELD: computer engineering.

SUBSTANCE: invention is aimed at increasing the reliability of a storage device by integrating an erase gate into it, capable of drawing electrons from a floating gate by applying a positive voltage to the erase gate. It is achieved due to the fact that the non-volatile memory device includes at least one memory cell, which includes a substrate, a stack structure, a tunnel dielectric layer, a floating gate, a control gate structure and an erase gate structure. The stack structure is located on a substrate and includes a dielectric gate layer, an auxiliary gate layer, and an insulating layer arranged in that order. The tunnel dielectric layer is located on the substrate on one side of the stack structure. The floating gate is located on the tunnel dielectric layer and includes a topmost edge and a curved side wall. The control gate structure covers the curved side wall of the floating gate. The erase gate structure covers the structure of the floating gate and the control gate, and the uppermost edge of the floating gate is included in the erase gate structure.

EFFECT: increasing the reliability of a storage device by integrating an erase gate into it, capable of drawing electrons from a floating gate by applying a positive voltage to the erase gate.

20 cl, 11 dwg