METHOD FOR MANUFACTURING PLANAR MOS POWER TRANSISTOR Russian patent published in 2004 - IPC

Abstract RU 2239912 C2

FIELD: semiconductor power engineering.

SUBSTANCE: transistor has insulating oxide region formed between source diffusion region and gate region, as well as diffusion region in substrate under insulating oxide of same polarity of conductivity as source; this diffusion region and insulating oxide form structure near drain that fixes channel length under gate between source and drain and distance between highly doped regions of source and drain irrespective of precision of alignment of photomask layers for producing gate, insulating oxide, source, and drain.

EFFECT: reduced resistance of open transistor and output capacitance, enhanced breakdown voltage of drain, and reproducibility of device parameters.

1 cl, 4 dwg

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RU 2 239 912 C2

Authors

Korolev M.A.

Tikhonov R.D.

Shvets A.V.

Dates

2004-11-10Published

2002-12-25Filed