SEMICONDUCTOR MEMORY DEVICE Russian patent published in 2018 - IPC G11C11/15 

FIELD: physics.

SUBSTANCE: semiconductor memory device comprises of an array of cells including a plurality of resistance changing elements formed over the semiconductor substrate, a plurality of first cell transistors formed on the semiconductor substrate and provided in association with the resistance changing elements, a plurality of first gate electrodes included in the first cell transistors and extending in the first direction, the first bit lines electrically connected to the resistance changing elements respectively and extending in the second direction perpendicular to the first direction, the second bit lines electrically connected to one end of the current path of the first cell transistors, respectively, and extending in the second direction, and a plurality of first active regions in which the first cell transistors are formed and which extend in the direction crossing the first direction at the first angle; and a bit line controller including a plurality of second cell transistors formed on the semiconductor substrate and each having a current path with one end electrically connected to the first bit lines or second bit lines, a plurality of second gate electrodes included in the second cell transistors and extending in the first direction, and a plurality of second active regions in which the second cell transistors are formed and which extend in a direction intersecting the first direction at the second angle.

EFFECT: providing the possibility of increasing the operating capacity and operating limits, while containing the increase in the size of the circuit.

20 cl, 14 dwg