MANUFACTURING METHOD OF SHF LDMOS TRANSISTORS Russian patent published in 2012 - IPC H01L21/336 

Abstract RU 2439744 C1

FIELD: electricity.

SUBSTANCE: manufacturing method of SHF LDMOS transistors includes growth of thick field dielectric at surface of high-ohmic epitaxial p- -layer of source silicone p-p+-substrate at periphery of transistor configurations, formation of source p+-junctions and p-wells of transistor cells in epitaxial p- -layer of substrate not covered with field dielectric, growth of gate dielectric and formation of polysilicone electrodes of transistor cells gate in the form of narrow lengthwise teeth of rectangular section with close adjoining tapped contact pads from source side over p-wells, creation of high-alloy n+-areas of sink, source and low-alloy n-area of transistor cells by introduction and further diffusion redistribution of donor dopant using gate electrodes as protective mask, formation of metal electrodes of sinking, source, screens and buses shunting gate electrodes of transistor cells through tapped contact pads at substrate face and common metal source electrode of transistor configuration at backside, the first degree of low-alloy multistage n-area of transistor cell source is formed after formation of source p+-junctions by introduction of donor dopant to epitaxial p--layer of substrate without usage of protective masks, p-wells, sink and source areas of transistor cells are created with use of additional dielectric protective mask identical in configuration and location of lengthwise teeth of polysilicone gate electrode without tapped contact pads adjoining to them, simultaneously with p-wells similar areas are formed at edges of low-alloy n-area of transistor cells sink and gate electrodes with tapped contact pads adjoining to teeth are formed after removal of additional dielectric protective mask and subsequent growth of gate dielectric, at that width of polysilicone gate electrode teeth are selected so that it exceeds length of transistor cell induced channel per overlay error value.

EFFECT: improvement in electric parameters of powerful silicone generating SHF LDMOS transistors, increase of their resistance to ionising radiation exposure and increase of production output in percents.

7 dwg

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RU 2 439 744 C1

Authors

Bachurin Viktor Vasil'Evich

Bychkov Sergej Sergeevich

Krymko Mikhail Mironovich

Pekarchuk Tat'Jana Nikolaevna

Sopov Oleg Veniaminovich

Dates

2012-01-10Published

2010-07-22Filed