FIELD: electronic equipment.
SUBSTANCE: in SHF LDMOS - transistor, which contains semi-conductor substrate with high-resistance and high-alloyed layers of the first type of conductance, elementary transistor cells in high-resistance layer of substrate with channel field of the first type of conductivity, high-alloyed source, high-alloyed and low-alloyed drain regions of the second type of conductivity, gate dielectric from thermal silica dioxide and gate electrode above channel region of transistor cells, thermal silica dioxide and interlayer dielectric above low-alloyed drain region of transistor cells, source and drain electrodes of transistor cells on the face side of substrate, field screening electrodes in the gap between drain and gate electrodes, which are connected to one of transistor cells source electrode ends outside the limits of gate electrodes, common electrode of transistor structure drain on back side of substrate, field screening electrodes of transistor cells are made of gate electrode material and are installed at the interface of thermal silica dioxide - interlayer dielectric, at that width of thermal silica dioxide above low-alloyed drain region makes (1.0-3.5) of gate dielectric width, and border of gate dielectric coupling with layer of thermal silica dioxide above low-alloyed drain region is installed under gate electrode.
EFFECT: increase of permissible limit values of electric parameters and operation modes of SHF LDMOS - transistors and provision of conditions for organisation of profitable industrial production of these items.
1 dwg, 2 tbl
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METHOD OF MANUFACTURING OF POWERFUL SILICON SHF LDMOS TRANSISTORS WITH MODERNIZED GATE NODE OF ELEMENTARY CELLS | 2016 |
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METHOD FOR MANUFACTURING A LATERAL DMOS TRANSISTOR WITH AN INCREASED BREAKDOWN VOLTAGE | 2023 |
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Authors
Dates
2008-11-10—Published
2007-01-16—Filed