FIELD: electricity.
SUBSTANCE: invention is intended for use in integral logic devices based on complementary unipolar field transistors of metal-oxide-semiconductor (MOS) structure with induced channels of p- and n-conductivity and bipolar transistors of n-p-n and p-n-p structures. Logic gate comprises MOS-keys with p- and n- conductivity, which source outputs are connected to buses of positive and negative supply poles respectively, emitter followers at bipolar transistors of n-p-n and p-n-p structures, which collectors are connected to buses of positive and negative supply poles respectively while emitters are connected to the logic gate output; MOS-keys with p- and n- conductivity are represented as more than two complementary pairs, wherein in each such pair source outputs of MOS-keys are connected and coupled to bipolar transistor base of the respective emitter follower.
EFFECT: improved reliability due to reduced parasitic capacitance of the main units.
3 dwg
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