MANUFACTURING METHOD OF SEMICONDUCTOR HETEROSTRUCTURE Russian patent published in 2015 - IPC H01L21/205 

FIELD: electricity.

SUBSTANCE: manufacturing method of semiconductor heterostructure for high-power SHF filed-effect transistor includes placement of pretreated single-crystal semi-insulating substrate of helium arsenide to a substrate holder in the gaseous phase epitaxy reactor, delivery of carrier gas - hydrogen, heating of the substrate holder up to operating temperature, delivery of growth process gases and further growing in the united process cycle in layer sequence of the preset semiconductor heterostructure. Each layer in layer sequence of the preset semiconductor heterostructure - buffer layer GaAs, donor layer n⁺-GaAs, spacer layer GaAs, channel layer In_yGa_1-yAs, spacer layer Al_xGa_1-xAs, donor layer n⁺-Al_xGa_1-xAs, barrier layer Al_xGa_1-xAs, stop layer In_zGa_1-zP, barrier layer Al_xGa_1-xAs, gradient layer n⁺-Al_xGa_1-xAs, contact layer n⁺-GaAs - is grown at certain process modes, at that content of chemical substances x, y, z are defined by inequalities 0.20≤x≤0.24, 0.21≤y≤0.28, 0.48≤z≤0.51 respectively.

EFFECT: reduced defects concentration and increased yield of fit semiconductor heterostructures, increased output power and yield of fit SHF FETs.

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