METHOD OF FORMATION OF MULTILEVEL METALLIZATION SYSTEM BASED ON TUNGSTEN FOR HIGH-INTEGRATED CIRCUITS Russian patent published in 2017 - IPC H01L21/768 H01L21/28 

FIELD: physics, computer engineering.

SUBSTANCE: invention refers to the technique of manufacturing of the multilevel metallization for large scale integrated circuits based on the method for formation of a multilevel metallization systems for high integrated circuits, comprising the steps of dielectric and metallic layers application, photolithography and grooves etching in these layers, barrier and germinal layers application, metal layer and its CMP application, the process of formation of a single-level metal wiring includes the following sequence of basic operations: a layer of tungsten is applied to a silicon plate with a formed transistor cycle to form horizontal conductors, CMP and through-etching of its areas are performed for filling with a conductive barrier layer of titanium nitride and dielectric, dielectric CMP, application of the barrier layer of titanium nitride and tungsten to form vertical conductors, tungsten layer CMP, through-etching of the areas for filling with a conductive barrier layer ofsilicon nitride and dielectric, dielectric CMP with subsequent application of a conductive barrier layer of titanium nitride to the obtained structure.

EFFECT: invention increases circuit resistance to high temperatures.

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