METHOD TO MANUFACTURE MULTI-LEVEL INTERCONNECTIONS OF INTEGRAL MICROCIRCUIT CHIPS WITH AIR GAPS Russian patent published in 2011 - IPC H01L21/764 

FIELD: electricity.

SUBSTANCE: method to manufacture multi-level interconnections of integral microcircuit chips with air gaps includes formation of the first conducting and first dielectric layers on the substrate, formation of holes in the first dielectric layer, formation of vertical conductors, by means of gas-cycle deposition of the second conducting layer, which covers its surface and fills holes, and removal of this layer from the surface of the first dielectric layer by chemical and mechanical polishing, etch removal of a part of the first dielectric layer selectively to the material of the second conducting layer, formation of a mask with a pattern of horizontal conductors, local etching of the first dielectric and first conducting layers, removal of the mask, as a result of which horizontal conductors are formed, coated with a non-etch-removed part of the first dielectric layer and separated with gaps, non-conformal deposition of the second dielectric layer with formation of closed air gaps. Then chemical and mechanical polishing of the second dielectric layer is carried put until the surface of vertical conductors opens, afterwards the cycle of formation of the next level of conductors is repeated, and a passivation cycle is formed.

EFFECT: reduced time of signals propagation delay, higher reliability and yield of good items, expanded technological capabilities of manufacturing.

6 cl, 9 dwg, 1 tbl