FIELD: instrument making.
SUBSTANCE: invention relates to the field of semiconductor devices manufacturing technology, in particular to the n+ hidden layers manufacturing technology. Method technology consists in the following: on the p-type conductivity with the resistivity of 10 Ohm*cm silicon plates with the orientation (111), n+ hidden layer formed by the arsenic ions with an energy of 150 keV, dose (2–4) 1012 cm-2 implantation at the substrate temperature of 500–600 °C, followed by acceleration at 1,200 °C in the 50 % oxygen O2/50 % nitrogen N2 mixture atmosphere and thermal annealing in the hydrogen atmosphere at the temperature of 1,000 °C for 20 minutes. Next, the transistor active regions and the contacts were formed using the standard technology.
EFFECT: increase in the gain values, enabling manufacturability, improving parameters, improving quality and increase in the usable yield percentage.
1 cl, 1 tbl
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Authors
Dates
2019-05-22—Published
2018-03-12—Filed