TASK DISPATCHER ARBITER Russian patent published in 2021 - IPC G06F13/37 G06F9/50 

FIELD: computer technology.

SUBSTANCE: invention relates to the field of computer technology and can be used for arbitration in multiprocessor information processing systems for parallelizing the flow of applications. The device has an external bus of the input IP request and N external buses of parameters of channels IC1, IC2, …, ICN, which consist of L groups of parameters, N external buses of occupancy of IT1, IT2, …, ITN channels, each of which contains M bits of priority rank (the highest priority rank has the lowest zero bit, the highest priority is the highest ITN channel), the first group of N external outputs of the indicators of the highest priority channel QU1, QU2, …, QUN and the second group of M external outputs of the indicators of the highest priority rank in the channel OZ0, OZ1, …, OZ (M-1), N internal buses of requests IZ1, IZ2, …, IZN, each of which contains M bits of priority, N bits of the internal bus of status of channels S1, S2, …, SN, N bits of the internal bus of readiness of channels K1 , K2, …, KN and the readiness flag F, and also contains a group of N parameter analysis blocks, each of which contains a group of L comparators and an AND element, a group of N request resolution blocks, each of which contains the first group of M AND elements , the first group of M OR elements, the second group of (M-1) AND inhibit elements with inverse inputs, a group of N channels readiness analysis blocks, each of which contains the third group of (M-1) AND elements and the first OR element, and also the second OR element, the second group of (N-2) OR elements and the fourth group of (N-1) AND inhibit elements with one inverse input.

EFFECT: invention makes it possible to provide possibility of analyzing the parameters of the input problem and the parameters of the channels for processing tasks.

1 cl, 1 dwg, 1 tbl