Patenton — panteon of patents

(19)

SU

(11)

1 393 249

(13)

A1

(51)

IPC

(21) (22)

Application

3978219/25, 1985-11-18

(22)

Actual filing date

1985-11-18

(45)

Published

1995-09-10

(72)

Inventor

Rudakov V.I.Peresvetov N.N.

METHOD FOR SEALING SEMICONDUCTOR INTEGRAL CIRCUITS Russian patent published in 1995 - IPC

Abstract SU 1393249 A1

FIELD: electronic devices. SUBSTANCE: crystal of integral microcircuit is sealed under cap which is made from the same material as crystal of integral microcircuit. Cap is connected to crystal by zone melting with temperature gradient. This is achieved by depositing aluminum layer with width 3 mcm along perimeter of crystal. Then this zone is melt until aluminum appears on outer side of cap. Cap is connected to crystal along its perimeter without seam. EFFECT: increased reliability. 4 dwg

Similar patents SU1393249A1

Title Year Author Number
PROCESS OF MANUFACTURE OF MICROCIRCUITS WITH DIELECTRIC INSULATION OF ELEMENTS 1990
  • Brjukhno N.A.
  • Sher T.B.
 SU1686982A1
0
  • Vaganov Vladimir Ivanovich
  • Pryakhin Gennadij Dmitrievich
 SU1783595A1
METHOD FOR GENERATION OF INTER-GATE CONNECTIONS IN INTEGRAL CIRCUITS 1991
  • Turtsevich A.S.
  • Krasnitskij V.Ja.
  • Dovnar N.A.
  • Buljak B.N.
  • Khimko G.A.
  • Kastritskij L.V.
 SU1799203A1
COMPONENT INTERCONNECTION 1990
  • Turtsevich A.S.
  • Dovnar N.A.
  • Rodin G.F.
  • Kozachonok G.M.
  • Malyshev V.S.
 SU1825236A1
MANUFACTURING PROCESS FOR MULTILEVEL INTERCONNECTIONS OF INTEGRATED CIRCUITS 1991
  • Bychok E.A.
  • Makarova L.S.
  • Nizhnikova N.V.
  • Stanovskij V.V.
  • Terekhov A.M.
 SU1814434A1
METHOD OF MAKING HOUSING BASED ON CHIP DIMENSIONS 2008
  • Gromov Vladimir Ivanovich
 RU2410793C2
METHOD OF OPTICAL CHECKING OF DEFECTS IN LOWER LAYERS OF SILICON STRUCTURES 1990
  • Chigir' G.G.
  • Soloninko A.A.
  • Pobortsev V.N.
  • Charushkina L.M.
 SU1819068A1
DEVICE FOR CHEMICAL SEPARATION OF SEMICONDUCTOR PLATES INTO CHIPS 1992
  • Grinchevskaja V.I.
  • Chertkov Ju.Z.
 RU2022406C1
METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURES WITH STEPPED SHAPE OF POLYCRYSTALLINE SILICON ISLANDS 1990
  • Gajduk S.I.
  • Balbutskij S.V.
  • Chausov V.N.
  • Sasnovskij V.A.
 SU1814445A1
METHOD FOR PRODUCING BIPOLAR INTEGRATED CIRCUITS WITH POLYSILOCON RESISTOR 1990
  • Gajduk S.I.
  • Balabutskij S.V.
  • Sasnovskij V.A.
  • Chausov V.N.
 SU1819070A1

SU 1 393 249 A1

Authors

Rudakov V.I.

Peresvetov N.N.

Dates

1995-09-10—Published

1985-11-18—Filed

read Similar patents