MIS TRANSISTOR MANUFACTURING PROCESS Russian patent published in 1995 - IPC

FIELD: microelectronics. SUBSTANCE: silicon oxide field-effect regions, active regions, and silicon oxide subgate layer are formed on silicon substrate, polysilicon layer is deposited, silicon nitride masking layer is applied, mask with ports suited to gate region pattern is formed from it, gate regions are formed from polysilicon layer, low-alloyed source regions (source of second type of conductivity) are formed in active regions, silicon oxide layer is formed on side surfaces of gate regions by heat treatment of gate regions and substrate in oxidizing medium followed by removal of silicon oxide layer from active regions by reactive ion etching, additional polysilicon layer is deposited and alloyed, high-alloyed source regions (drain of second type of conductivity) are formed by heat treatment in inert medium with alloying admixture transferred from additional layer to substrate, additional masking layer is applied, ports self-aligned with gate regions are formed in additional masking, layer and in additional polysilicon layer, additional masking layer is removed, mask with ports suited to pattern of contact pads and buses of source-drain regions is formed, contact pads and buses are formed from additional polysilicon layer, silicon nitride masking layer is removed, high-melting metal film is removed, heat treatment in inert medium is conducted to form contact pads and buses from high-melting metal silicide, and high-melting metal film that has not reacted with polysilicon is removed. EFFECT: improved make-up density, improved speed of response of MIS transistors due to combining contact pads of drain and source buses with gate regions, reduced overlapping area between drain and source contact pads and gate regions. 10 dwg