METHOD FOR MANUFACTURING MIS TRANSISTOR WITH LOCAL SECTIONS OF BURIED INSULATOR Russian patent published in 2004 - IPC

FIELD: electronic engineering; manufacture of integrated circuits of high radiation resistance.

SUBSTANCE: proposed method for manufacturing MIS transistors with local sections of buried insulator includes formation of insulating layer about active regions of transistor on surface of silicon substrate of first polarity of conductivity; implanting of ions, primarily those of oxygen; formation of wall regions in substrate until high-concentration layer of oxygen and silicon dioxide atoms is produced deep in substrate upon implanting ions, primarily those of oxygen; formation of wall regions on side walls of gate; this is followed by implanting ions of second polarity of conductivity in high-concentration layer of oxygen and silicon dioxide atoms where use is made of components whose material atoms incorporate high oxides forming glass together with silicon dioxide; thin buried insulator layer, high-doped active drain-source regions, and their low-doped sections abutting against gate on both ends are formed simultaneously by baking at temperature higher than softening point but lower than forming glass vitrifying temperature within time interval including migration time of implanted atoms of second polarity of conductivity and time of diffusion doping in active drain-source regions, length of mentioned time interval meeting condition of formation of intermediate sections having still lower degree of doping under wall regions in direction of gate.

EFFECT: facilitated manufacture, enhanced operating reliability of devices.

1 cl, 4 dwg