FIELD: microelectronic engineering. SUBSTANCE: storage item has silicon substrate with alloyed layer 1, first dielectric layer 2, recrystallyzed polysilicon layer 3, third dielectric layer 4, second dielectric layer 5, grooves filed with polysilicon 6, polysilicic gate layer 7, source area 8 and drain area 9, fourth dielectric layer 10, conducting layer 11, contact area 12, contacting area 13 between drain and conducting layers, heavily alloyed area 14. EFFECT: improved degree of integration and reliability of storage item. 2 dwg
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