STRUCTURE FORMATION METHOD FOR INTEGRATED CIRCUITS WITH INSULATED COMPONENTS Russian patent published in 1995 - IPC

Abstract RU 2035805 C1

FIELD: microelectronics. SUBSTANCE: method involves mechanical treatment of silicon substrates, formation of pattern with cavities, buried layer, silicon dioxide layer, and monocrystal silicon layer of thickness 11-14% greater than depth of pattern on monocrystal substrate surface. Silicon dioxide layer is applied to polycrystal silicon layer and to pattern-free substrate, and this layer is covered with junction layer whose thickness makes up 40-56% of pattern depth; composition of this layer is as follows, mass percent: silicon dioxide powder obtained by plasma-chemical synthesis- 1.4-1.5; boron oxide - 1.4-1.5; isopropyl alcohol - 68-69.2; deionized water - 28-29. Upon application of junction layer substrates are joined together, subjected to heat treatment, and monocrystal areas of silicon are opened. EFFECT: facilitated procedure. 4 dwg

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RU 2 035 805 C1

Authors

Serousov I.Ju.

Matovnikov V.A.

Bur'Ba V.V.

Shein Ju.F.

Zhilin L.M.

Dates

1995-05-20Published

1991-12-27Filed