FIELD: optoelectronics. SUBSTANCE: gate electrodes, gate dielectric, and amorphous hydrogenated silicon layer are formed on transparent substrate. Contact layer pf doped silicon is applied according to structure pattern. Contact areas leading to amorphous hydrogenated silicon and source and drain electrodes are formed on mask in the form of photoresist islands. Then contact layer is etched until surfaces not shielded by mask are removed while monitoring etching process by optical characteristics of substrate with layers evaporated on it. Upon removal of mask, cuts with gate electrode are opened, source and drain electrodes and connections are formed. EFFECT: facilitated procedure. 2 cl, 7 dwg
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