FIELD: microelectronics; integrated circuits with polycrystalline active and passive components. SUBSTANCE: method includes molding of plates, extraction of organic binder from castings, high-temperature treatment of the latter, and production of microrelief. Plate molding operations are combined with microrelief production by sticking silicon plates of desired microrelief to side walls of molds; desired microrelief is attained by depositing photoresist onto silicon strip; then negative image of layout pattern is formed by means of photomask and SiO2 layer is removed through cuts in photoresist using chemical technique, whereupon photoresist is removed and silicon plates are given anisotropic etching through desired depth by regulating etching time, these procedures being followed by auxiliary thermal operations. EFFECT: improved quality of microrelief layout pattern, reduced cost and labor consumption. 5 dwg
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Authors
Dates
2001-08-27—Published
2000-07-05—Filed