FIELD: semiconductor engineering.
SUBSTANCE: high-power semiconductor device 10 has active region incorporating drift area 20. At least part of drift area 20 is disposed in membrane 16 that has upper and lower surfaces 15 and 17 opposing one another. Upper surface 15 of membrane 16 in one of alternatives has power leads connected thereto directly or mediately to enable crosswise voltage application through drift area 20. As an alternative, at least one power lead is connected directly or mediately to upper surface 15 and at least one power lead is connected directly or mediately to lower surface 17 enabling vertical application of voltage through drift area 20. Lower surface 17 of membrane 16 has no semiconductor substrate in immediate proximity of this surface in each of mentioned alternatives.
EFFECT: improved design.
40 cl, 43 dwg
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Authors
Dates
2006-05-10—Published
2001-09-20—Filed