FIELD: physics.
SUBSTANCE: insulated gate semiconductor device having an active cell (5) which has a p-type conduction channel pocket (6), surrounded by a third n-type layer (8), where the device has extra pockets (11), adjacent to the channel pocket (6) outside the active semiconductor cell (5), and has improved parametres of the stable operation region. The extra pockets (11) lying outside the active cell (5) do not have an effect on the structure of the active cell from the view point of the pitch of the cell, i.e. on design standards with respect to arrangement of cells, and on the hole drain between the cells.
EFFECT: obtaining an optimum profile for distribution of charges on the side of the emitter in order to reduce loss in open state.
10 cl, 10 dwg
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Authors
Dates
2010-12-20—Published
2006-05-18—Filed