FIELD: electricity.
SUBSTANCE: method of hidden fault location of silicon-gate MOS multiplexers on a silicon wafer with suitable MOS crystals of multiplexers involves opening windows in a filed oxide layer to metallised areas of MOS sources of transistors and a substrate, coating with an indium layer, forming an indium area which short-circuits all the MOS sources of the transistors on the substrate in each crystal. The indium area which short-circuits all the MOS sources of the transistors on the substrate is stripped only over the MOS sources of the transistors. It is followed with known-good chip check to locate hidden faults and to form In stubs.
EFFECT: method allows providing higher reliability of hidden fault location of the silicon-gate MOS multiplexers due to elimination of direct short-circuits of the stock areas on the substrate.
4 dwg
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