FIELD: electricity.
SUBSTANCE: in semiconductor instrument containing sink, source consisting of transistor cells and peripheral p-n junction, which are located under gate electrode, as well as of metal electrode of source, which is located above gate electrode, polysilicon gate electrode insulated from source areas with dielectric, which contains in middle part the matrix of transistor cells and peripheral end part overlapping above the dielectric the source peripheral p-n junction; end part of polysilicon gate electrode, which overlaps above the dielectric the source peripheral p-n junction, is topologically separated from end cell of matrix of transistor cells and not covered with source metal coating.
EFFECT: reducing the resistance of power double-diffused MOS transistors in open state, without increase in the size of crystal and deterioration of other parameters.
2 cl, 3 dwg
Title | Year | Author | Number |
---|---|---|---|
METHOD FOR MANUFACTURING OF SEMICONDUCTOR DEVICE | 2010 |
|
RU2431905C1 |
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | 2013 |
|
RU2531122C1 |
TRANSISTOR WITH CURRENT LIMITATION AND METHOD OF ITS MANUFACTURING | 2008 |
|
RU2370855C1 |
SHF LDMOS-TRANSISTOR | 2007 |
|
RU2338297C1 |
SEMICONDUCTOR DEVICE PERIPHERY, NEUTRALISING EFFECT OF CHARGE ON STABILITY OF RETURN LEAKAGE AND BREAKDOWN VOLTAGE | 2008 |
|
RU2379786C1 |
METHOD OF MAKING POWER INSULATED-GATE FIELD-EFFECT TRANSISTORS | 2006 |
|
RU2361318C2 |
MANUFACTURING METHOD OF SHF POWERFUL FIELD LDMOS TRANSISTORS | 2008 |
|
RU2364984C1 |
HIGH-POWER DMOS-TRANSISTOR MANUFACTURING PROCESS | 2000 |
|
RU2189089C2 |
BIPOLAR TRANSISTOR WITH DIELECTRIC-INSULATED GATE | 1992 |
|
RU2065642C1 |
POWERFUL MICROWAVE LDMOS TRANSISTOR AND METHOD OF ITS MANUFACTURING | 2011 |
|
RU2473150C1 |
Authors
Dates
2011-12-20—Published
2010-06-11—Filed