METHOD OF VOLTAGE LIMITERS MANUFACTURING Russian patent published in 2018 - IPC H01L21/329 

Abstract RU 2651624 C1

FIELD: electricity.

SUBSTANCE: invention relates to the field of high-power silicon voltage limiters (protective diodes) designing and producing, mainly with breakdown voltages from 3 V to 15 V, designed to protect electronic components, that are integrated microcircuits and semiconductor devices in radio electronic equipment (REE) from the impact of powerful pulsed electrical surges of various kinds. Method of voltage limiters manufacturing with breakdown voltages from 3 V to 15 V, containing basic silicon crystals with p-n junctions created in them, consisting of p-layers doped with a p-type conductivity admixture, and n-layers doped with an n-type conductivity admixture, dielectric protection of p-n junctions and metal ohmic contacts, metal heat sinks, metal leads and sealed enclosures, according to which, according to the invention, the base crystals are made of silicon doped with a p-type conductivity admixture, that is boron with a concentration of 2⋅1020 cm-3 up to 4⋅1017 cm-3, corresponding to the silicon specific resistivity from 0.001 Ohm⋅cm to 0.1 Ohm⋅cm, and p-n junctions in basic silicon crystals are formed by long-term high-concentration diffusion of the n-type conductivity admixture, namely, arsenic from an infinite source in an evacuated quartz ampoule at a temperature of ~1150°C for a period of 8 - 48 hours.

EFFECT: invention provides a low-voltage voltage limiters manufacturing method based on single silicon p-n structures with breakdown voltages from 3 V to 15 V with p-n junctions lying on a sufficient for power devices depth of greater than 10 mcm.

1 cl, 1 dwg, 2 tbl

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RU 2 651 624 C1

Authors

Skornyakov Stanislav Petrovich

Glukhov Aleksandr Viktorovich

Glushkov Anatolij Evgenevich

Chishchin Vladimir Fedorovich

Dates

2018-04-23Published

2017-04-03Filed